Stellenangebote für System Programmer Jobs in Genève

14.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 125’000 - CHF 150’000 In Salesforce with end to end implementation experience. 3. integration experience, including between different business systems as well as working with integration tools. 4. Ability to define the system landscape, to identify gaps between current and desired end-states, and deliver a solution. 5

13.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 When necessary, like PERT (Programme Evaluation and Review Technique) or RBSA (Risk-Based Schedule Analysis). - Define procedures, as far as the schedule is concerned, for the Earned Value Management application. - Prepare documentation and facilitate communication between stakeholders, ensuring clear

13.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 When necessary, like PERT (Programme Evaluation and Review Technique) or RBSA (Risk-Based Schedule Analysis). - Define procedures, as far as the schedule is concerned, for the Earned Value Management application. - Prepare documentation and facilitate communication between stakeholders, ensuring clear

10.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 Will demonstrate a client-oriented, results-focused approach to interpreting rules, procedures and guidelines. You will act in an advisory manner to programme - project personnel to maximize the impact of financial resources in delivering programmes - projects. You will provide quality support to ensure accurate

10.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 Communication protocols. In particular JESD204B. Wishbone, VME64x, and Intel Avalon, SPI, I2C; - Solid understanding of Digital Signal Processing (DSP) and Clock Domain Crossing (CDC) Techniques; - Experience in version control systems, specifically Git; - Knowledge of good practices for long-term programme

10.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 Time signal processing. Your profile Skills - Experience with hardware description languages (HDL), especially System Verilog (Verilog and VHDL would be an asset); - Experience with Python; - Experience in the design of complex digital design systems, implemented using FPGAs; - Strong understanding

10.07.25 | Vollzeit | Genève | JobLeads GmbH | CHF 80’000 - CHF 100’000 Communication protocols. In particular JESD204B. Wishbone, VME64x, and Intel Avalon, SPI, I2C; - Solid understanding of Digital Signal Processing (DSP) and Clock Domain Crossing (CDC) Techniques; - Experience in version control systems, specifically Git; - Knowledge of good practices for long-term programme